Jack (@jackakattack) 's Twitter Profile
Jack

@jackakattack

Full Stack Bug Developer. Texas Forever 🤘

ID: 16304352

calendar_today16-09-2008 00:25:11

682 Tweet

259 Followers

453 Following

PULP Platform (@pulp_platform) 's Twitter Profile Photo

We are delighted to hear that Chipyard, an open source framework for agile development of Chisel-based SoCs developed at UC Berkeley, supports several cores from PULP ecosystem. youtu.be/pYyv8BJ5n68?t=… github.com/ucb-bar/chipya… chipyard.readthedocs.io/en/stable/

We are delighted to hear that Chipyard, an open source framework for agile development of Chisel-based SoCs developed at UC Berkeley, supports several cores from PULP ecosystem.
youtu.be/pYyv8BJ5n68?t=…
github.com/ucb-bar/chipya…
chipyard.readthedocs.io/en/stable/
CHIPSAlliance (@chipsalliance) 's Twitter Profile Photo

Join the hybrid CHIPS Alliance Technology Update hosted by Google for talks on #openhardware & collaborative #ASIC / #FPGA development by Intel, @westerndigital, Antmicro, SiFive and University of Michigan, following #60DAC. Register: events.linuxfoundation.org/chips-biannual… RISC-V International The Linux Foundation @60thDAC

Join the hybrid CHIPS Alliance Technology Update hosted by <a href="/Google/">Google</a> for talks on #openhardware &amp; collaborative #ASIC / #FPGA development by <a href="/intel/">Intel</a>, @westerndigital, <a href="/antmicro/">Antmicro</a>, <a href="/SiFive/">SiFive</a> and <a href="/UMich/">University of Michigan</a>, following #60DAC. Register: events.linuxfoundation.org/chips-biannual… <a href="/risc_v/">RISC-V International</a> <a href="/linuxfoundation/">The Linux Foundation</a> @60thDAC
CHIPSAlliance (@chipsalliance) 's Twitter Profile Photo

Watch talks from members on collaborative #opensource projects including Open Se Cura, #Caliptra RoT, #Chipyard, #UVM testbenches in #Verilator & using #FuseSoC w/ VeeRwolf: youtube.com/watch?v=_FUw1_… The Linux Foundation RISC-V International Google Antmicro VeriSilicon UC Berkeley Olof Kindgren

Watch talks from members on collaborative #opensource projects including Open Se Cura, #Caliptra RoT, #Chipyard, #UVM testbenches in #Verilator &amp; using #FuseSoC w/ VeeRwolf: youtube.com/watch?v=_FUw1_… <a href="/linuxfoundation/">The Linux Foundation</a> <a href="/risc_v/">RISC-V International</a> <a href="/Google/">Google</a> <a href="/antmicro/">Antmicro</a> <a href="/verisilicon/">VeriSilicon</a> <a href="/UCBerkeley/">UC Berkeley</a> <a href="/OlofKindgren/">Olof Kindgren</a>
SiFive (@sifive) 's Twitter Profile Photo

📢 New board alert! The HiFive Premier P550 is the highest performance #RISCV development board in the industry. Available through Arrow Electronics this board enables developers to test & develop new RISC-V applications. Learn more here: hubs.la/Q02sgxc80 #NoLimits

Framework (@frameworkputer) 's Twitter Profile Photo

DeepComputing is showing an early demo of the new RISC-V Mainboard at the RISC-V International Summit in Munich next week. This board uses a StarFive Technology JH7110 with SiFive RISC-V CPU cores. DeepComputing is also working closely with the teams at Ubuntu and Fedora Project (@[email protected]) on Linux support.

SiFive (@sifive) 's Twitter Profile Photo

The SiFive Intelligence X280 is out of this world! ⭐ MicrochipTechnologyInc. is integrating our X280 64-bit #RISCV cores into the company’s high-performance space-flight computing processor. Read more via Electronics Weekly: hubs.la/Q02Hdmk20 #NoLimits

SiFive (@sifive) 's Twitter Profile Photo

📢 The SiFive HiFive Premier P550 development boards are now shipping! Grab one from the initial pre-release batch of 100 Yocto-ready boards via Arrow Electronics, or wait for the Ubuntu-supported version coming in Q4. Learn more: hubs.la/Q02V6v7H0 #RISCV #NoLimits

📢 The SiFive HiFive Premier P550 development boards are now shipping! Grab one from the initial pre-release batch of 100 Yocto-ready boards via <a href="/ArrowGlobal/">Arrow Electronics</a>, or wait for the Ubuntu-supported version coming in Q4. Learn more: hubs.la/Q02V6v7H0 #RISCV #NoLimits
SiFive (@sifive) 's Twitter Profile Photo

“If you’re looking to push the boundaries of what’s possible with RISC-V, this could be the test and development platform you’ve been waiting for.” Dave Altavilla shares his take on the SiFive HiFive Premier P550 development board here: hubs.la/Q02VN58C0 #NoLimits

SiFive (@sifive) 's Twitter Profile Photo

.Electronic Design shares more on the HiFive Premier P550 development board, featuring a quad-core #RISCV SoC, Imagination GPU, and ESWIN NPU, built for next-gen embedded development. Read all about it: hubs.la/Q02VN2Lc0 #NoLimits

Jorge Vicente Cantero (@jvican) 's Twitter Profile Photo

It's absolutely crazy to me that the most exciting Scala projects today are actually happening in the hardware RISC-V space with tools like Chisel rather than the traditional, stronghold domains. And, on top of that, they innovate in chip design.

CHIPSAlliance (@chipsalliance) 's Twitter Profile Photo

The whitepaper is here! Designed to demystify the current state of #openhardware #opensilicon, outline the challenges ahead, and chart a path forward for everyone from startups to silicon giants. chipsalliance.org/news/tac-white…

SiFive (@sifive) 's Twitter Profile Photo

Big news from SiFive: We're launching five new RISC-V IPs in our 2nd Gen Intelligence lineup to accelerate AI — from far edge IoT to the data center! - X160 Gen 2 - X180 Gen 2 - X280 / X390 / XM Gen 2 Learn more 👉 sifive.com/press/new-x100… #NoLimits