FireSim
@firesimproject
Easy-to-use, Scalable, FPGA-accelerated Cycle-accurate Hardware Simulation project in EECS @UCBerkeley. RISC-V Clusters in the Cloud.
ID: 903091650397741056
https://fires.im 31-08-2017 03:06:42
135 Tweet
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kiniry
@kiniry
Dad. Partner. Scientist. Activist. Maker. — He/Him Mastodon at @[email protected]
Bertrand Schmitt
@bschmitt
EIR at redriverwest.com, Co-Host decipheredshow.com, Co-Founder @AppAnnie/@DataAI, @ISEP and @Wharton alum, 🇫🇷 born and raised. Tweets are my own
Mike Evans
@mikeev
bsky.app/profile/mikeev…
hackaday
@hackaday
🔥 Read: hackaday.com ☠️ Contribute: tips at hackaday dot com 👉 Projects: @hackadayio #Fediverse: @[email protected] 📒 Learn: hackaday.io/u
Rick Altherr
@mxshift
Pronounced like mischief. BMC Bandit, secure boot aficionado, FPGA liberator. they/them. Mentoring: calendly.com/mxshift Fedi: @[email protected]
randyhkatz
@randyhkatz
Berkeley Professor Emeritus and Vice Chancellor for Research Emeritus Former "DARPA Scientist"
Galois
@galois
Galois applies cutting edge computer science and mathematics to solve difficult technological problems.
DigiKey
@digikey
We’re a full-service partner offering design tools, business solutions, and the world’s largest selection of in-stock electronic components
Mike Zeile at Intel
@mzeile
VP, Data Center Group at @Intel. Career-long focus on #Ethernet and #Networking. Previously President of @fulcrummicro. Opinions are my own.
Jan Gray
@jangray
SC25
@supercomputing
Official Twitter for the SC Conference Series • SC25 • Nov 16–21, 2025 • America’s Center, St. Louis, MO
Tim 'mithro' Ansell
@mithro
Open Source Hardware Geek
Muzaffer Kal @🏡 🦆⏩
@muzafferkal_
Chips: ASIC, FPGA. CV/ML. Duck pictures by the lake. Some bread making. He/They [email protected] @mkal.bsky.social threads.net@muzafferkal_
Chris Williams
@diodesign
Find me in the blue skies @ diodesign.org
Saugata Ghose
@saugataghose
Computer architect who started working on Random Access Memories around the same time as Daft Punk. One of us went platinum. Assistant professor @IllinoisCDS
DARPA
@darpa
Official account of the Defense Advanced Research Projects Agency. Follows/retweets/links do not = endorsement. Breakthrough technologies for national security.
ARPA-E
@arpae
The official account of the Advanced Research Projects Agency-Energy Retweets do not equal endorsement
ACM SIGDA
@acmsigda
@TheOfficialACM Special Interest Group on Design Automation (SIGDA)
Samira Khan
@samiramanabi
Professes @CS_UVA, builds things at SystemsResearch@Google, ex-@CarnegieMellon, hosts #HappyHourwithArchitects. Vanity is not my fav sin, self-deprecation is.
Association for Computing Machinery
@theofficialacm
The world's largest professional organization advancing #computing as a science and profession. Also @mastodon.acm.org Likes & shares ≠endorsement
Shweta Shinde
@shw3ta_shinde
Assistant Professor at ETH Zurich @CSatETH, Security Researcher. @[email protected]
Antmicro
@antmicro
Antmicro is a software-driven tech company developing open and modern industrial edge and cloud AI systems.
Jack Wadden
@jackwadden
Post-doc @UMich in the @KoschmannLab. Research: intro-operative/rapid sequencing, high-accuracy cf-tDNA sensing. @nanopore hacker. He/him 🏳️🌈
ACM Digital Library
@acmdl
A research, discovery and networking platform from @TheOfficialACM focused exclusively on the field of computing.
Jeremy Bennett
@jeremypbennett
Open source software engineer and political activist. Academic turned entrepreneur. Founder of Embecosm.
Singh, Satinder Paul
@paulsatinder
Chief Technical Officer | Strategist in Semiconductor Technology domain | VLSI/SoC/ASIC/IC (Chip) Design Specialist
Howard Mao
@zhemao
UC Berkeley EECS PhD Student
Olof Kindgren
@olofkindgren
No longer active here. Moved to other similar platforms
Jerry Zhao
@jerryzh123
PhD Student in Computer Architecture @UCBerkeley EECS. I work on the @boom_cpu.
Edward Wang
@edwardcw
Graeme Smecher @[email protected]
@graemesmecher
Do you have an instrumentation challenge? FPGA, DSP, Linux, Python, SDR
David Schor
@david_schor
Semiconductor logic and computer architectures. Chip and Process Analysis. See also @WikiChip.
Jyrki Alakuijala 🇺🇦
@jyzg
Plumber for the Internet Pipes. I'm the (co-)designer of Jpegli, Brotli, Butteraugli, JPEG XL, Guetzli, WebP lossless, WOFF2, and Zopfli. Opinions are my own.
Zvonimir Bandic
@zbandic
Research Scientist, Hacker, Maker, Sr. Director of Next Gen Platforms Tech in WDC research; loves RISC-V CPUs, Machine learning accelerators PCM, ReRAM, SSDs
Hackster.io
@hacksterio
Hackster is the world’s fastest growing developer community for learning, programming, and building hardware with 2.4M+ members and 40K+ open source projects.
Magnus Jahre
@magnusjahre
Scientist, engineer, and associate professor within computer architecture @NTNU
jonathan bachrach
@jackbackrack
Chris Lattner
@clattner_llvm
Building beautiful things like Mojo🔥 and MAX @Modular, lifting the world of production AI/ML software into a new phase of innovation. We’re hiring! 🚀🧠
lowRISC
@lowrisc
lowRISC® is a not-for-profit engineering company that creates and maintains commercial-grade open silicon designs through its collaborative Silicon Commons
RISC-V International
@risc_v
RISC-V International is the non-profit home of the open standard RISC-V Instruction Set Architecture (ISA), related specifications, and stakeholder community.
Ayar Labs
@ayarlabs
Ayar Labs is transforming AI infrastructure by accelerating data movement with its cutting-edge optical I/O solution.
Calista Redmond
@calista_redmond
VP Global AI Initiatives @nvidia, Open Source advocate, accidental vegetarian, average snowboarder, Girl Scout camp mom
Jason Eshraghian
@jasoneshraghian
assistant professor @ucsc / neuromorphic engineer & filmmaker
Wenting mostly on bsky
@zephray_wenting
Engineer, co-founder of Modos Tech Inc. ⚖️🍄 @wenting.bsky.social
PARSA EPFL
@parsa_epfl
PARSA at @EPFL_en engages in research and educational activities to pioneer future server design.
Matthew Ballance
@bitsbytesgates
Verification methodology by day. Author and open-source developer by night. All opinions my own.
Latch-Up
@latchupconf
Latch-Up, by @fossifoundation Boston, MA April 19-21 2023. fossi-foundation.org/latch-up/2024 Catch up at Latch-Up!
CHIPSAlliance
@chipsalliance
CHIPS (Common Hardware for Interfaces, Processors and Systems) Alliance harnesses the energy of open source collaboration to accelerate hardware development.
Shreesha Srinath
@shreeshasrinath
open-source hardware enthusiast
HPCA
@hpcaarchconf
IEEE International Symposium on High-Performance Computer Architecture
Lisa Wu Wills
@lisawuwills
computer architect, assistant professor, francophile, research and french bulldog obsessed
OpenROAD
@openroad_eda
The OpenROAD project attacks the barriers of Cost, Expertise and Uncertainty (i.e. Risk) that block the feasibility of hardware design in advanced technologies.
Computer Architecture Student Association (CASA)
@comparchsa
Support system 𝒇𝒐𝒓 students and 𝒃𝒚 students in computer architecture! Managed by @alenkruth and @ataugustning Retweets ≠ endorsements.
Nayiri
@nayirikr
eecs phd student @UCBerkeley
Parthasarathy Ranganathan
@partha_ranga
Edmund Humenberger
@ico_tc
mostly about open source FPGA tools and chip design tools
Stanko Novakovic
@stankonovakovic
Accelerating systems infrastructure innovation
PULP Platform
@pulp_platform
A joint effort of @ETH_en, University of Bologna @Unibo + partners for Parallel Ultra-Low Power computing. Boldly designing open hardware since '13.
SiFive
@sifive
As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute. With SiFive, RISC-V has no limits!
Oron Port
@soronpo
CEO and Co-founder of DFiant | Opensource contributor | Scala SIP committee member
Zip CPU
@zipcpu
FPGA design engineer and blogger, placing particular emphasis on test and formal verification
Sophia Shao
@sophia_shao_
Assistant Professor @ UC Berkeley
Luca Benini
@lucabeninizhfe
Ferrara, Palo Alto, Ferrara, Zurich... Boh
keystone-enclave
@keystoneenclave
An Open Framework for Architecting TEEs