Live Webinar: Tuesday, Nov. 12, 15:30 GMT. Learn how Palladium provides a high throughput emulation and testbench acceleration platform that can also be leveraged as part of a multi-engine metric-driven verification flow. Register: bit.ly/2MZMbRM

Cadence Dives Deeper at Linley Fall Processor Conference semiwiki.com/events/276694-… #Ai/ml #CadenceIpStrategy #EmbeddedVision #EmbeddedVisionSummit #FacebookGlow #Hifi5Dsp #LinleyProcessorConference #Tensilica

Cadence Announces Tempus Power Integrity Solution for Signoff Timing-Aware IR Drop Analysis $CDNS newsfilter.io/articles/caden…

EDA's highest honor goes to Dr. Mary Jane Irwin, the first woman to achieve the Phil Kaufman Award, for distinguished contributions to electronic system design. Learn more about Dr. Irwin's amazing career: bit.ly/2JUwFoB #womenintech #electronicdesign

“Looking at the evolution of the automotive industry over the past several years, there is a clear path to Level 3 & Level 4 autonomy,” cites Thomas Wong, director of marketing, Automotive Segment at Cadence. Read full Global Semiconductor Alliance (GSA) article: bit.ly/2Cp3jKP

Want to learn more about #5G designs? Check out our resources at 5G Boot Camp to enhance your knowledge of design tools and techniques for delivering 5G products: bit.ly/32pKYIc

Attending SemiCon Europe 2019? Don't miss the Jim Hogan Fireside Chat: The Risk of Obsolete Design and Verification Environments in the RISC-V Era. Cadence VP Paul Cunningham and other industry players will fuel the discussion. semiconeuropa.org/programs-catal… #semiconeuropa

NEW: Gifts totaling $6M from Cadence Design Systems (Cadence) and CEO Lip-Bu Tan will advance emerging technology research and teaching at CMU. cmu.is/professorships

If you are at the Dubai Airshow next week, come by our booth 1259 at the US Pavilion or listen to the Cadence expert addressing Intelligent System Design for digital twinning in aerospace and defense application. #DubaiAirshow cadence.com/content/cadenc…

New Cadence UltraLink D2D PHY IP for Die-to-Die Connectivity Enables High-Performance Applications with Cost-Effective Packaging Silicon-proven, high-bandwidth, low-latency interface.cadence.com/content/cadenc…

Last chance to register for our half-hour electrical-thermal co-simulation webinar on Tuesday, November 19th at 7:00am PST or 12:00pm PST. Learn about the best methods to accurately analyze complex 3-dimensional IC structures: bit.ly/373TErf

At #DubaiAirshow Frank Schirrmeister presents Cadence Intelligent Design for digital twinning in aerospace and defence applications at the US Pavilion Forum. Visit Cadence booth 1362 cadence.com/content/cadenc…

Enabling Domain Specific SoCs with High Performance IP in Advanced Process Nodes. Listen to Arif Khan, Cadence, on Nov 19 at 11.20am at #semisrael19 semisrael-expo.com/conference

NEWS: Cadence completed the acquisition of AWR Corporation from National Instruments to expand its reach into #5G #RF communications and support system #innovation for the aerospace and defense, automotive and wireless market segments. Read more ➡️ bit.ly/2ssJ6T3

#DesignCon: Learn in our free educational sessions on SI/PI, advanced IC packaging, and system analysis with Analog Devices, Inc., MediaTek, Samsung Foundry, and more. Get a chance to win a high-tech prize for each #Cadence session you attend! 🎟 Sign up now ➡️ bit.ly/2urJHVP

Join Srdjan Djordjevic, Sigrity expert at #Cadence, for this free one-hour training #webinar. Learn how to minimize DDR supply & DC drop at the PCB/package level, obtain the required DDR supply impedance profile over frequency & more! Register now ➡️ bit.ly/32cFCRR

Find out how today’s creative companies are delivering tomorrow’s extraordinary products! #UnleashImagination with #Cadence ➡️ bit.ly/33b8H0D #CadenceDesignSystems #DesignedWithCadence

NEWS: #TensorFlow Lite for Microcontrollers is now supported on Tensilica HiFi DSPs, enabling more rapid development of edge AI and ML applications using advanced audio, voice and sensing. Read more ➡️ bit.ly/2TVz72m #Cadence #CadenceDesignSystems #EdgeAI

Sanjay Gangal of EDACafe.com interviews fschirrmeister to talk about the latest in verification. See video ➡️ bit.ly/3cQbTDh #Cadence #CadenceDesignSystems

NEWS: To advance chip design creation for emerging applications like #automotive, mobile, networking, #HPC and #AI, Cadence introduced new digital full flow enhancements. Read more ➡️ bit.ly/2WiLOa9 #CadenceDesignSystems