“RISC-V vector processors are already being used for a broad range of applications ranging from computer vision, mobile ISP, and edge AI to datacenter AI, and will continue to see explosive market adoption in the coming years.” bit.ly/3OICXYJ #RISCVeverywhere

OMG ! it seems that a lot of people want to make their own RISC-V CPU on a FPGA !

Writing a Really Tiny RISC-V Emulator youtu.be/YT5vB3UqU_E

VLC now supports RISC-V hardware! Read More: news.itsfoss.com/vlc-3-0-18-rel…

Great news! The Linux Foundation Training & Certification Cyber Week promo has been extended through 12/7/22. Browse the catalog. ➡️ hubs.la/Q01tRX0V0 Last chance to take advantage of 30-65% off our entire catalog. The Linux Foundation

#RISCV members are hiring! Learn about why #RISCV careers are thriving as we’re shaping the future of computing. Plus, make sure to register for the #RISCVSummit for great networking opportunities. hubs.la/Q01vk9Lb0 #RISCVeverywhere

Check out Electronic Design’s recap of some of the latest #RISCV dev platforms for everything from robotics to home automation: hubs.la/Q01vkqSS0

The 2022 #RISCVSummit starts in two hours! Head to the San Jose McEnery Convention Center if you’re attending in-person, or join virtually from the comfort of your home. It’s not too late to register here: hubs.la/Q01vFjl90

Foundations of RISC-V Assembly Programming (LFD117x) is now open for registration: bit.ly/lfd117xlinkedin #RISCVSummit #RISCVeverywhere

The #RISCV ecosystem saw significant technical progress in 2022 with the community’s work on RISC-V Profiles, the Crypto vector ISA extension, and much more. Learn more about the major RISC-V milestones this year: hubs.la/Q01vLc4S0

Google presenting the official RISC-V support for Android. Already merging patches and building in the CI in the way to become tier-1 platform. #RISCVSummit #Android #RISCV

Not in, but right after the stream, I found the issue we had with the DRAM: I missed copying one function call, whoopsies! It now successfully boots from the cacheable RAM. Here's the OpenSBI blob followed by U-Boot on the VisionFive1, initialized by oreboot. WE DID IT! \o/

Thank you to the global #RISCV community for an incredible year! We look forward to seeing what new heights we can all achieve as we work to bring #RISCVeverywhere.

We’re excited to announce the formation of the Open Metaverse Foundation, setting the stage for practical, powerful progress in building an open, inclusive world of interactive, immersive experiences for all. Learn more: hubs.ly/Q01ytFn20 #Metaverse Open Metaverse Foundation

Want to learn how to verify a #RISCV core? Watch this super helpful tutorial from Maven Silicon’s Putta Satish where he explains the complete RISC-V DV flow: bit.ly/3Jlr5eu #RISCVeverywhere

LLVM 16 was released this morning 🎉- I've written up a tour of some of the RISC-V related changes and new features in this development cycle muxup.com/2023q1/whats-n…

I'm happy to announce that DRAM init in oreboot on the StarFive Technology #VisionFive 2 works now. That took a long time. Why that? The Orbit memory controller on the JH7110 has 5 blocks: 2 for the controller, 3 for the PHY. I got confused with them quite a bit. Live stream to follow!

risc-v: updating vision-five2 firmware rpsene.wordpress.com/2023/05/09/ris…

📢 Planning my schedule for the #RISCVSummit! So many exciting talks to choose from. Which sessions are you attending? Let's compare notes and make the most of this incredible event. Share your must-see sessions! ctt.ec/UdHf1+ 🗓️🔍 #RISCVeverywhere

#RISCVSummit 2023 will explore new developments in Mobile, from smartphone to base station. Register now to discover the latest on designing and benchmarking mobile SoCs, porting of Android, and even ​​5G chipsets for wireless infrastructure! events.linuxfoundation.org/riscv-summit/