Check out the ChipFlow very early alpha! We are dedicated to building the best user experience possible to build custom ICs. It’s early days and *your* input is important.

Everyone says the Intel 8086 processor has 29,000 tiny transistors. But I counted and found 19,618. Why the difference? It turns out that most counts include "potential" transistors as well as real ones. Let's take a look and find out why.🧵

Place and Route is the #ASIC terminology of the week! zerotoasiccourse.com/terminology/pl… In the last month, Place and Route has been the 18th most popular out of 42 terms.

This week Matthew Venn of the Zero To ASIC Course returns to The Amp Hour to talk about what has been happening in the world of #OpenSource #Silicon, both the tools that make things go and the projects that people are creating. buff.ly/3R2nLGN

In this tutorial you'll learn how to build, simulate and extend a custom #RISCV SoC using the Amaranth #HLS language. docs.chipflow.io/en/latest/tuto…

Great to see so many people interested in Free and Open Source Silicon at #FOSDEM2023! fosdem.org/2023/schedule/… will have the slides and the recording soon. If you haven't done so, subscribe to El Correo Libre (fossi-foundation.org/ecl) to keep in touch with the community.

And thanks to Matthew Venn for helping me prepare some of the content! Have a look at his Zero to ASIC course and the Tiny Tapeout project if you are looking for a guided way into the world of ASIC development.

My first ever paper was accepted to ISCAS 2023. It's a fully opensource neuromorphic chip. Download the paper: arxiv.org/abs/2302.01015 Checkout the repository: github.com/sfmth/OpenSpike Special thanks to @mguthaus and Jason Eshraghian, co-authors of this work.

New guest post by Victor Suarez Rovere and PipelineC (fosstodon.org/@pipelinec)! In this article we present a tool flow that takes C++ code describing a raytraced game, and produces digital logic that can be implemented in off-the-shelf #FPGA with no hard or soft CPU used. blog.yosyshq.com/p/3d-raytracin…

.Rob Taylor (he/him), CEO at ChipFlow, will be taking us on a journey, setting out the history of this rapidly growing ecosystem of open source semiconductor design and the commercial applications. Head to the Open Hardware room now!

We are happy to announce Google as a sponsor for Latch-Up in Santa Barbara, CA March 31 to April 2! Thank you for your support of free and open source silicon. For more information about the event, visit latchup.io Catch up at Latch-Up!

Time to try a very high resolution stitch of the National NS32032 microprocessor...

It's Valentine's day, so let's bring some love to you all with a new edition of El Correo Libre fossi-foundation.org/ecl/ecl59 This time we have the new FOSSi toolchain from QuickLogic Corp., Hossein Askari's NNA called BARVINN, Antmicro's NVMe ML accelerator and much more. Enjoy!

This week Rob Taylor (he/him), CEO of ChipFlow joins me from #stateofopencon #SOOCon23 to chat about about the intersection between open source software design and hardware design and more. The Business of Open Source: emilyomier.com/podcast/rob-ta…

Watch Rob Taylor (he/him) CEO of ChipFlow's talk: "A Chip on my Shoulder" at State of Open Con 23 #SOOCon23 #opensource #OpenHardware ow.ly/xyx350N9SNI

EU #chips act has been agreed! Exciting times for #semiconductor #transformation in Europe. lnkd.in/dqBQ_VfC

#TinyTapeout 3 closed on Monday, and I've been putting together the statistics and getting the datasheet built. We had 100 submissions (25% from universities) and I filled the remaining space with 149 designs submitted to TinyTapeout 2.

In this great post by bastian, bl0x we follow his journey of implementing a #RISCV CPU with Amaranth #HDL. Some great background on using #FPGAs for science, and his challenges and successes while following Bruno Levy 's excellent Blinker to RISCV guide. blog.yosyshq.com/p/blinker-to-r…

🎉🎉🎉 lnkd.in/e-SNzMW9