Matthew Venn(@matthewvenn) 's Twitter Profileg
Matthew Venn

@matthewvenn

Engineer and Technology Communication. On a mission to make ASICs more accessible. YosysHQ & Tiny Tapeout founder member.

@[email protected]

ID:19602951

linkhttps://ZeroToASICcourse.com calendar_today27-01-2009 17:24:22

8,9K Tweets

10,6K Followers

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psychogenic(@PsychogenicTech) 's Twitter Profile Photo

Took me like 20 hours, and 'magic' almost drove me completely mad, but I finally got to sculpting at the nanoscale: 2 first analog layouts for the upcoming Tiny Tapeout TT06, and they're LVS clean! Exciting!

Took me like 20 hours, and 'magic' almost drove me completely mad, but I finally got to sculpting at the nanoscale: 2 first analog layouts for the upcoming @tinytapeout TT06, and they're LVS clean! Exciting!
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adammaj(@MajmudarAdam) 's Twitter Profile Photo

Ramiro easy is a relative term but it's very manageable I'd say. If you want to learn the EDA stuff I highly recommend Matthew Venn's zero to asic course

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Tiny Tapeout(@tinytapeout) 's Twitter Profile Photo

mmm, gold 555! Design by Vincent Fusco and render by Maximo

'I can't tell you how excited I am about the fact that I can tape out some analog circuits for less than $1k now.'

6 closes in 9 days!

mmm, gold 555! Design by Vincent Fusco and render by @maxiborga 'I can't tell you how excited I am about the fact that I can tape out some analog circuits for less than $1k now.' #TinyTapeout 6 closes in 9 days!
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Matthew Venn(@matthewvenn) 's Twitter Profile Photo

WLCSP is the terminology of the week!
zerotoasiccourse.com/terminology/wlā€¦

In the last month, WLCSP has been the 21st most popular out of 42 terms.

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Matthew Venn(@matthewvenn) 's Twitter Profile Photo

Selena Neutrino Experimentā€™s aSe/CMOS charge sensor pixel array ā€œTopMetalSeā€ chip design submitted by Xiaochen Ni to MPW6 & more:
github.com/harryxni/TopMeā€¦

Keen on analog open chip design? TinyTapeout.com + ZeroToASICCourse.com can help!

Selena Neutrino Experimentā€™s aSe/CMOS charge sensor pixel array ā€œTopMetalSeā€ #opensource #ASIC chip design submitted by Xiaochen Ni to MPW6 & more: github.com/harryxni/TopMeā€¦ Keen on analog open chip design? TinyTapeout.com + ZeroToASICCourse.com can help! #openASICs
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Claude Schwarz(@Claude1079) 's Twitter Profile Photo

While waiting for some PCBs to arrive from assembly in China I had some spare time to pick up a project again.
Fully reversed the Colorlight K5+ Board/SOM Pinout. 118 3.3V GPIOs on easy to solder B2B connectors, 8MB SDRAM, ECP5-25 , dual Realtek Gig-E Phys
twitter.com/Claude1079/staā€¦

While waiting for some PCBs to arrive from assembly in China I had some spare time to pick up a project again. Fully reversed the Colorlight K5+ Board/SOM Pinout. 118 3.3V GPIOs on easy to solder B2B connectors, 8MB SDRAM, ECP5-25 , dual Realtek Gig-E Phys twitter.com/Claude1079/staā€¦
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Paris Marx(@parismarx) 's Twitter Profile Photo

To celebrate the showā€™s fourth birthday, we want to make a series that digs into the resource footprint of AI and asks how much computation is enough. Support on Patreon to help us hit our goal!

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Tortle(@turtlecat314) 's Twitter Profile Photo

Work-in-progress trying to decap a recent chip from Matthew Venn's

Unfortunately the fill pattern has made it really hard to see much of interest other than the I/O cells and power straps, even w/ good optics. Curious about options for removing the top metal layers!

Work-in-progress trying to decap a recent chip from @matthewvenn's #tinytapeout Unfortunately the fill pattern has made it really hard to see much of interest other than the I/O cells and power straps, even w/ good optics. Curious about options for removing the top metal layers!
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adammaj(@MajmudarAdam) 's Twitter Profile Photo

I was challenged to make a chip from scratch in <2 weeks with no prior experience

Hereā€™s how Iā€™m planning to speed run the entire learning process for chip design & fabrication (suggestions welcome)

1. Prerequisites
> Review circuits physics - (semiconductors, p-n, junctions,ā€¦

I was challenged to make a chip from scratch in <2 weeks with no prior experience Hereā€™s how Iā€™m planning to speed run the entire learning process for chip design & fabrication (suggestions welcome) 1. Prerequisites > Review circuits physics - (semiconductors, p-n, junctions,ā€¦
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Frans Skarman (thezoq2@mastodon.social)(@TheZoq2) 's Twitter Profile Photo

Interested in what a modern waveform viewer can do? I presented Surfer at OSDA Workshop (Open-Source Design Automation) last week and here is a re-recording of that talk. It even includes an embedded demo!

youtube.com/watch?v=z3Rqzdā€¦

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Matthew Venn(@matthewvenn) 's Twitter Profile Photo

Wafer is the terminology of the week!
zerotoasiccourse.com/terminology/waā€¦

In the last month, Wafer has been the 39th most popular out of 42 terms.

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TobiasšŸŒ¾(@TobisLab) 's Twitter Profile Photo

I often get questions about my setup for taking macro shots, so I thought I'd finally do a short thread showing what I use. šŸ§µ

I often get questions about my setup for taking macro shots, so I thought I'd finally do a short thread showing what I use. šŸ§µ
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Matthew Venn(@matthewvenn) 's Twitter Profile Photo

Check out the latest cool projects and videos from your favourite makers at makernews.substack.com/p/march-2024-rā€¦ !

Featuring MAYER MAKES šŸ¦† Becky Stern Chris Greening OSHWA (Open Source Hardware Association) and lots more!

Obviously I think bitluni's silicon rickroll is the best - but I'm biased!

Check out the latest cool projects and videos from your favourite makers at makernews.substack.com/p/march-2024-rā€¦ ! Featuring @MAYERMAKES @bekathwia @MrBananas @oshwassociation and lots more! Obviously I think @bitluni's silicon rickroll is the best - but I'm biased!
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