Adam Taylor (@ataylorfpga) 's Twitter Profile
Adam Taylor

@ataylorfpga

FPGA and Embedded Systems expert, Experienced #System, #Hardware, #FPGA designer. Views My Own

ID: 2420700746

calendar_today31-03-2014 15:27:30

8,8K Tweet

14,14K Followers

8,8K Following

Adam Taylor (@ataylorfpga) 's Twitter Profile Photo

FPGAs are great for DSP, over the years I have created a lot of material on this area. My blog this week collates all these resources into a handy reference, so no matter if you want to learn about fixed or floating point math in FPGA, rounding, algorithms, creating filters or

FPGAs are great for DSP, over the years I have created a lot of material on this area. 

My blog this week collates all these resources into a handy reference, so no matter if you want to learn about fixed or floating point math in FPGA, rounding, algorithms, creating filters or
Adam Taylor (@ataylorfpga) 's Twitter Profile Photo

I like backing projects on Kickstarter and Crowsupply, though my accountant probably does not like it. I backed this one on Kickstarter a little while ago the Particle Tachyon - It is interesting it has 8 Processor cores, a 12 TOPS NPU, 8GB RAM, MIPI support and 5G and WiFi

I like backing projects on Kickstarter and Crowsupply, though my accountant probably does not like it.

I backed this one on Kickstarter a little while ago the Particle Tachyon - It is interesting it has 8 Processor cores, a 12 TOPS NPU, 8GB RAM, MIPI support and 5G and WiFi
Adam Taylor (@ataylorfpga) 's Twitter Profile Photo

I am curious if you work in FPGA / ASIC design in the Mil Aero, Space, High Reliability world. Are you allowed to use AI/ML tools for code generation.

Adam Taylor (@ataylorfpga) 's Twitter Profile Photo

I will be giving one of the featured talks at Altera's innovation day on September 30th, in San Jose. My talk will focus on toolchains, efficiency and the creation of image processing pipelines. For those interested in attending, you can register at the following link:

I will be giving one of the featured talks at Altera's innovation day on September 30th, in San Jose. My talk will focus on toolchains, efficiency and the creation of image processing pipelines.

For those interested in attending, you can register at the following link:
Adam Taylor (@ataylorfpga) 's Twitter Profile Photo

I have done many amazing things with FPGAs, but I think one of the proudest is starting the FPGA Horizon series of conferences. I am passionate about sharing best practice and engineering knowledge to hep us as engineers. My great friend Clive (Max) Maxfield just wrote an

Adam Taylor (@ataylorfpga) 's Twitter Profile Photo

At the edge, there are several interesting applications which require machine learning, from image processing to anomaly detection. This week I am looking at how we can instantiate and test the MathWorks Deep Learning Processor unit in out FPGAs. adiuvoengineering.com/post/microzed-…

At the edge, there are several interesting applications which require machine learning, from image processing to anomaly detection. This week I am looking at how we can instantiate and test the MathWorks Deep Learning Processor unit in out FPGAs.

adiuvoengineering.com/post/microzed-…
Marcelo Samsoniuk (@samsoniuk) 's Twitter Profile Photo

sometimes I fall in shame that Adam Taylor is the only FPGA guy that really works here... everyone else is posting on twitter or just sleeping at the job while Vivado is busy "running jobs" 🤣

Pablo Trujillo (@controlpaths) 's Twitter Profile Photo

I truly think that if you are FPGA designer, you need to know about FPGA Conference or FPGA Horizons in the same way that if you work in cybersecurity, you need to know about DEFCON or Blackhat. In other cases, you are working as FPGA designer, but you are not.

Adam Taylor (@ataylorfpga) 's Twitter Profile Photo

The Vitis System design and Vitis Meta Archive flow for Versal are interesting. It allows you to create your HLS / AIE application in Vitis then bring it back into your Vivado design for the final optimisations and implementation.

The Vitis System design and Vitis Meta Archive flow for Versal are interesting. It allows you to create your HLS / AIE application in Vitis then bring it back into your Vivado design for the final optimisations and implementation.
Adam Taylor (@ataylorfpga) 's Twitter Profile Photo

One of the challenging things about being a Consultant Engineer is making other engineers and companies aware of your existence and skills. Would people be interested in a Consultant section on the newsletter where Consultants can showcase their capabilities ? As I am putting my

Adam Taylor (@ataylorfpga) 's Twitter Profile Photo

What do I actually do? A question which popped up about FPGA Consultants. Here is what I go up to last week, it was a pretty busy week but at least there was no international travel. It was the first week since the beginning of April that was the case. I suspect it is a little

Adam Taylor (@ataylorfpga) 's Twitter Profile Photo

Are you an engineer who is daily hands on designing, creating, integrating, building? Far too many "Engineers" spend thier lives writing power points, in meetings, playing political games etc.

Adam Taylor (@ataylorfpga) 's Twitter Profile Photo

It is a bit last minute but it looks like next week I will be interviewing someone at microchip in a fire side chat. What questions would you want to ask? Let me know below and I will filter in the most interesting ones?