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Philippe and Charlie The Bear were happy to welcome Simon Moore from Cambridge behind the Capability Hardware Enhanced RISC Instructions (CHERI) project: cl.cam.ac.uk/research/secur…

And of course Charlie The Bear & Cyril could not miss the opportunity to take a picture with Alexandra Kourfali, the Programme Manager Research and Innovation at EuroHPC JU. eurohpc-ju.europa.eu/index_en

We have published the slides and poster from Riccardo's #RISCV Summit Europe talk "CVA6S+: A Superscalar RISC-V Core with High-Throughput Memory Architecture". Find them here: pulp-platform.org/docs/riscvsumm… & pulp-platform.org/docs/riscvsumm….

More from Charlie The Bear at the #RISCV Summit EU in Paris 😀. Below our guys Victor Victor Jung , Sergio Sergio Mazzola who together with Charlie The Bear welcome the new #RISCV CEO Andrea Gallo.

Sergio's Sergio Mazzola #RISCV Summit EU presentation on "MemPool Flavors: Between Versatility and Specialization in a RISC-V Manycore Cluster" is now online, as well: pulp-platform.org/docs/riscvsumm…

RISC-V Summit in Paris is wrapping up and Charlie The Bear is listening to the last keynote. The next year's summit will take place in Bologna, with our friend Andrea Bartolini as local chair!!

Our #HotChips2025 poster submission was just accepted. Check out now the two-page abstract on "Basilisk: A 34 mm² End-to-End Open-Source 64-bit Linux-Capable RISC-V SoC in 130nm BiCMOS" on arXiv: arxiv.org/pdf/2505.10060 Thomas Benz

We were thrilled to have Gagandeep Singh from AMD R&D to help us with our exercise session where we introduced AMD’s IRON AI Engine API amd.com/content/dam/am… to our students and worked on a cloud server comprising their AMD Ryzen GPUs. Then we enjoyed some well-deserved lunch!

Cyril's Work-In-Progress poster "Accelerating Numpy With OpenBLAS For Open-Source RISC-V Chips" presented this week at the #RISCV Summit EU in Paris is now online: pulp-platform.org/docs/riscvsumm… Have a great weekend!

Victor's poster Victor Jung "Fused-Tiled Layers: Minimizing Data Movement on RISC-V SoCs" presented at #RISCV Summit Europe in Paris is now on our website: pulp-platform.org/docs/riscvsumm…

We had a great week in #Paris at the RISC-V International. Very productive talks with PULP Platform and nice exchange with Axelera AI about extensions for wireless communication. #Satellites and #submarines were also part of this week European Space Agency NASA Many thanks to Research in Germany - Initiative of the BMBF #France #risc

And here is the poster "On-Device Federated Continual Learning on RISC-V-based Ultra-Low-Power SoC for Intelligent Nano-Drone Swarms" by Lars and Cristian Cristi Cioflan presented at the #RISCV Summit Europe in Paris: pulp-platform.org/docs/riscvsumm… & arxiv.org/abs/2503.17436

We present "MXDOTP: A RISC-V ISA Extension for Enabling Microscaling (MX) Floating-Point Dot Products" with a dedicated dot product-accumulate unit integrated into our Snitch core. See arxiv.org/pdf/2505.13159

14 team members, 2640 m altitude difference, 114 km in 9h37min. We ranked 287th at the 50th edition of the SOLA Stafette. Congrats Christoph Leitner Cristi Cioflan Giusy Spacone Victor J. Kartsch Marco Bertuletti Þórir Már 🇺🇦 Victor Jung corporate.migros.ch/de/verantwortu… sportrait.com/overview/event…

We would like to introduce our new team member Anna who will work on machine learning applications. Welcome to the team, Anna!

Our paper Michael Rogenmoser "Trikarenos: Design and Experimental Characterization of a Fault-Tolerant 28nm RISC-V-based SoC" accepted as IEEE TNS paper now contains comparison of the radiation results with fault injection simulations in the netlist. See arxiv.org/pdf/2407.05938

We are getting ready for the 1st SwissChips event, fostering chip design research in Switzerland swisschips.ethz.ch/news-and-event…. Charlie The Bear sure seems to like these SwissChips 😀 🐻.

"How to keep pushing ML accelerator performance? Know your rooflines!" Check out the survey of key trends for more efficient ML accelerators by Marian Verhelst, Luca Benini Luca Benini and Naveen Verma: arxiv.org/pdf/2505.16346

Writing this paper was great fun, and quite some work... 🙏 Marian for the discipline ;-) I hope it will help understand how to design accelerators! By the way, there is a typo in one formula... cookie point if someone finds it before it's officially corrected 😏

"Navigate Your Way to a Career in Semiconductors" event for students recently took place at ETH Zurich. Organized by EFCL and Cristina Borelli, below Andrea Cossettini and guests Jang Taekwang, Laura Bégon-Lours & for industry Chiara Martelli & Richa Bubna designthesolution.org/event/navigate…