The first microprocessor with built in security for differential power analysis is just out of the oven. Read more about this RISC V compliant microprocessor here: arxiv.org/abs/1911.08813 @VinodG93 Rahul Boddhuna ShaktiProcessors Hardware Security

“PARAM: A Microprocessor Hardened for Power Side-Channel Attack Resistance” (Muhammad Arsath K F, Vinod Ganesan, et al.; accepted for HOST 2020) 📄 arxiv.org/pdf/1911.08813… #RISCV #security

Power Side-channel Leakage Evaluation of a RISC-V Microprocessor youtu.be/C-R-gIGzLRA via YouTube ShaktiProcessors Vinod Sreedharan Rahul Boddhuna Muhammad Arsath K F IIT Madras