The MIPS Atlas Explorer bridges the gap between hardware and software, accelerating development and ensuring scalable, long-term product lifecycles. Learn more about our groundbreaking digital twin and system-level optimization tool. mips.com/products/softw…

MIPS CEO Sameer Wasson recently spoke at the Infineon and RISC-V International Automotive Conference 2025, sharing how Physical AI applications, including aerospace, industrial, and automotive, will be based on open standards with a focus on targeted workloads and hardware/software

MIPS will be joining industry leaders and innovators at GlobalFoundries Technology Summit (GTS) in Munich next week. Meet the team and discover how the powerful combination of GF and MIPS brings together decades of expertise in advanced semiconductor manufacturing and processor

According to @MarketsandMarkets, the Physical AI market is projected to reach $23 billion by 2030. This growth is powered by rapid advances in AI and robotics technologies that enable machines to interact autonomously and intelligently within real-world environments. MIPS is

MIPS welcomes Moshe Hillel as Head of Business Development for Israel! In this role, Moshe will drive MIPS RISC-V adoption across the region, building on his extensive background in semiconductor solutions for analog and digital embedded application processing to support MIPS’

Next week, MIPS speakers are presenting on multiple topics on RISC-V development at the RISC-V International Summit North America, October 22-23, in Santa Clara. Come meet the MIPS speakers and team at the MIPS sponsored welcome reception. mips.com/contact/ #RISCVSummit

MIPS introduces the I8500 Processor, orchestrating data movement for the AI era. The 3rd generation MIPS I8500 processor is now sampling to leading customers, delivering industry-leading throughput efficiency and performance per area for real-time, event-driven embedded

AI requires data orchestration, real-time decision making, event-driven processing and mission critical data paths.  The MIPS I8500 is purpose built for Physical AI, up to 6 cores per cluster, scaling up to 64 clusters, 384 cores, and 1536 threads.  Learn more in this video.

Sameer Wasson and David Bell took the stage GlobalFoundries GTS to discuss the transition from chatbots to robots, from data center to the edge,  and highlighted the Physical AI-ready I8500. The I8500 is a specialized data orchestration processor for high-speed, rule-based data

MIPS is sponsoring the welcome reception at the Radiation Hardened Electronic Technologies Meeting, held in Albany, NY from November 3–6. MIPS looks forward to meeting with experts on the latest requirements and technologies shaping the future of Physical AI.

The MIPS Atlas Explorer virtual platform gives developers a powerful way to assess, understand, and optimize software for new compute platforms right from the concept phase. mips.com/products/softw…

Meet MIPS at Embedded World North America, November 4–6 in Anaheim, CA. We will be sharing the latest development for our RISC-V IP processors for embedded applications. #RISCV #embedded mips.com/events/embedde…

The MIPS Atlas Explorer's high-fidelity processor modeling technology delivers deep insights into micro-architectural function and efficiency that transform system design. #SoC architects and software engineers now have unprecedented visibility into processor performance before

CoxAutomotive reports that the global #automotive AI market is projected to reach $4.2 billion in 2025, driven by the rising adoption of autonomous vehicles and #ADAS. MIPS is delivering real-time #AI compute solutions that enable safer, smarter, and more efficient vehicles for

The industrial robotics market is projected to reach $85.6 billion by 2034, driven by Industry 4.0, automation, AI, and smart manufacturing. As robotics become pivotal across automotive, electronics, and manufacturing sectors, the need for real-time, safe, and efficient compute

Today the MIPS I8500 won Embedded Computing Design’s Best in Show Award for Microcontrollers, Microprocessors, and IP at Embedded World! Stop by booth 2009 to meet the MIPS team and learn more about our RISC-V IP processors that Sense, Think, Act, and Communicate, the essential

MIPS' Sean Murphy took the stage at Embedded World, sharing how MIPS is creating #RISCV custom instructions to accelerate real-rime applications. He unveiled a novel solution for accelerating real-time motor control algorithms using a MIPS defined trigonometric math custom

At Embedded World, Mark Throndson spoke on “Networking Native RISC-V Processor for the Datacenter,” discussing several optimizations that can be achieved within a standard #RISCV solution that tailor the implementation to networking. He highlighted the multi-threaded,