HAFLANG - Functional Languages in Hardware (@haflangproject) 's Twitter Profile
HAFLANG - Functional Languages in Hardware

@haflangproject

Hardware implementations of high level functional programming languages. Supported by the EPSRC HAFLANG project at Heriot-Watt University (EP/W009447/1).

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linkhttps://haflang.github.io calendar_today04-08-2022 21:38:09

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Our IFL paper presents a processor for non-strict functional languages. By avoiding complex CPU circuitry and compiler indirections, it performs 6 times more reductions per cycle than GHC, competing with a 4.7GHz Intel CPU despite clocking at only 193MHz. doi.org/10.1145/365256…

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"Calculateur Fonctionnel" - A great name for a French functional architecture. We appreciate the nod to recursion, with the display unit in the display unit in the... From "A Functional Data-flow Architecture Dedicated to Real-time Image Processing", Sérot et al., PACT'93.

"Calculateur Fonctionnel" - A great name for a French functional architecture.

We appreciate the nod to recursion, with the display unit in the display unit in the...

From "A Functional Data-flow Architecture Dedicated to Real-time Image Processing", Sérot et al., PACT'93.
HAFLANG - Functional Languages in Hardware (@haflangproject) 's Twitter Profile Photo

Our paper "Cloaca: A Concurrent Hardware Garbage Collector for Non-Strict Functional Languages" has been accepted to the Haskell Symposium 2024. It combines mark-and-sweep tracing with one-bit reference counting. It runs concurrently to the mutator, both implemented in hardware.

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Our latest paper about Cloaca, an FPGA-based GC that uses hardware-level synchronisation and write barriers to avoid damaging graph reduction performance. We see significantly higher throughput and lower latency compared with a software GC implementation. doi.org/10.1145/367799…

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Yukang Xie, a new PhD student on this HAFLANG project, is investigating processor design for functional languages. His background is dataflow architectures for cryptography, and has developed an interest in functional languages and their implementations. haflang.github.io/people.html

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Craig Ramsay is giving a project talk "Hardware Architectures for Lazy Functional Programming, Revisited" at SPLS at the University of Glasgow, 6th November. spli.scot/spls/meetings/…

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Some active and recent graph reduction projects, which implement functional programming languages directly in custom hardware. A slide from Craig Ramsay's HAFLANG seminar talk at Chalmers University today.

Some active and recent graph reduction projects, which implement functional programming languages directly in custom hardware.

A slide from Craig Ramsay's HAFLANG seminar talk at Chalmers University today.
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Yukang Xie is presenting his research at TFP 2025 in Oxford. Draft paper title: "KappaMutor: A Compact Structured Combinator Processor for Haskell" Yukang is a PhD student on our EPSRC HAFLANG project.