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#TSMC could have 2nm process ready for mass production by 2024 #silicon #cpu techspot.com/news/87617-tsm…

We were there! ⁦Vitamin-V Project⁩ ⁦EUCloudEdgeIoT⁩

Smiling faces and the world premiere of the Vitamin-V polo shirt. This is the end of the Vitamin-V consortium meeting in Barcelona in parallel with the #RISCVSummitEurope. Thanks Ramon Canal for the organization! Thanks BSC-CNS for the visit to the MN4 and MN5.

Lab's collaborative work from IEEE Transactions on Computer (Oct 2022), recognized in the IEEE Computer Magazine July 2023 issue "Spotlight to Transactions" column! ieeexplore.ieee.org/stamp/stamp.js…; Kudos to all authors: P.R.Bodmann, G.Papadimitriou, R.L.Rech Jr, D.Gizopoulos, P.Rech.

During the ”RISC-V Summit Europe 2023” in Barcelona in June, 2023, the NKUA team presented a poster entitled ”Enabling Design Space Exploration of RISC-V Accelerator-rich Computing Systems on gem5”. 📄 The poster presents one of the main aspects of the Neuropuls project.✅

Operate your server at low voltages to save power but think soft error rate will pick up? Our #MICRO56 paper shows our findings (FIT and SDC rates increase) with neutron beaming of server CPUs at reduced voltages (#ieee, #acm, #microarchitecture, #voltage, #softerrors).

#MICRO23 catch up! It was nice to see you all at MICRO 2024 in Toronto! Very interesting talks, keynotes and discussions!

We won the IEEE Transactions on Computers Best Paper Award for year 2022 by the IEEE CS Publications Board for our lab's paper ieeexplore.ieee.org/document/96164….🚀🏆. An incredible recognition for joint research among U Athens, UFRGS, U Trento.

MICRO deadline CRUNCH TIME! Just under a month left to submit your groundbreaking research 💥

Semidynamics announces All-In-One AI IP for super powerful, next generation AI chips design-reuse.com/news/56007/sem…

The MICRO hotcrp website is officially open! 🚀 We're awaiting your best work! micro2024.hotcrp.com Abstract Deadline: April 11, 2024 at 11:59 PM CDT Full Paper Deadline: April 18, 2024 at 11:59 PM CDT

Updates from our lab's work on Vitamin-V Project: the RISC-V hypervisor (H) extension is now fully implemented on gem5 (will go public on gem5 repo). Baremetal (type-1) hypervisor (Xvisor) up and running, hosting VMs and workloads! Stay tuned.

So proud of the CA Lab @ Di.UoA team!

📢Call for Workshops & Tutorials📢 Submission Deadline: January 31, 2025 Notification: February 14, 2025 Workshops & Tutorials Dates: June 21-22, 2025 For more details, please see here: iscaconf.org/isca2025/submi…

We’re thrilled about the REBECCA project’s presentation at EFECS 2024! 🎉 The team showcased advancements in RISC-V systems, chiplet technology, and tools for safety and security, sparking meaningful discussions. 🚀👏 @Chips_JU #REBECCAProject #EFECS2024 #Innovation #RISC-V

Co-packaged optics deliver high-speed connectivity to supercharge generative #AI computing research.ibm.com/blog/co-packag… #IBM #circuits #LLMs #EnergyEfficiency

Check out our latest article at Open Access Gov for the value of simulation frameworks in optimizing the development and integration of photonic and electronic systems #simulation #gem5 #neuropuls #photonic #RISC-V #AI #accelerators #technology openaccessgovernment.org/article/accele…

China's #SpacemiT develops 64-core RISC-V datacenter CPU — 12nm chip allegedly performs like a 10-year old Xeon or Opteron but with higher core count #riscv #datacenter #ai #cpu #intel #amd tomshardware.com/pc-components/…

Check out our latest article on how simulation frameworks based on gem5 are leveraged in the Neuropuls project to extract key metrics such as latency and energy consumption of RISC-V-interfaced photonic accelerators. openaccessgovernment.org/article/accele…