🔥The 9th Round of Easy Loan, Earn $40 Reward is in progress❗️ ⏰ Promotion Period: January 15th - Feburary 15th, 2025 👉 Register now and check more details at gate.io/campaigns/358

#nvidia #sass disassembler: redplait.blogspot.com/2025/03/nvidia… spoiler: you can do it yourself without their nvdisasm

#nvidia #sass disassembler part 2: redplait.blogspot.com/2025/03/nvidia… now output looks more similar to nvdisasm

#nvidia #sass disassembler part 3: redplait.blogspot.com/2025/03/nvidia… wtf are A, RF, TTU, UMMA & GMMA in nvidia jargon?

#nvidia #sass disassembler part 4: redplait.blogspot.com/2025/03/nvidia… native decoders in boring c++ no "normal" rendering yet

tex/tld #sass instructions from sm120 has 27 operands imho this is a record among all assemblers I know

#nvidia #sass disassembler part 5: redplait.blogspot.com/2025/03/nvidia… now we can decode and render sass instructions in c++ - without even nvdisasm installed

lea rdx, offset_20 mov ebp, [rdx+rax*4] lea rdx, offsets mov eax, [rdx+rax*4] lea rdx, some_data shl rbp, 20h or rbp, rax mov rax, rbp and eax, 7FFFh lea rsi, [rdx+rax-1] after rax&7FFFh offset_20 is totally lost, right?

llvm-dis (core dumped) #0 0x0000559d1bd7243d in llvm::Intrinsic::getIntrinsicInfoTableEntries (id=0, T=...) at llvm/lib/IR/Function.cpp:1339 1339 unsigned TableVal = IIT_Table[id-1]; p id $1 = 0 Not only is its API so volatile that it essentially doesn't exist, it simply crashes

#ptx instructions emitting by #nvidia compiler: redplait.blogspot.com/2025/03/ptx-in…

#ptx instructions emitting by #nvidia compiler v12: redplait.blogspot.com/2025/04/ptx-in…

> Implicits do not introduce new types as typing rules and are unlikely to interfere with soundness WHAT? from cs.purdue.edu/homes/rompf/pa…

really useful use example of gpu: github.com/muhos/ParaFROST

#nvidia #sass disassembler part 6: instructions predicates: redplait.blogspot.com/2025/04/nvidia…

x.com/scheminglunati… you can't measure the performance of quantum processor because of Heisenberg's indeterminacy principle

#nvidia #sass disassembler, part 7: dual issued instructions: redplait.blogspot.com/2025/04/nvidia…

#nvidia should be ashamed: mov rax, cs:ptxAllowMacros_ptr mov byte ptr [rax], 0 call parse what else they took from us?

std::map<const NV_tab *, std::list< std::pair<short, std::map<std::string_view, int> > > > iter->second.second.first like car/cdr in lisp c++ is madness

#nvidia #sass latency tables: redplait.blogspot.com/2025/05/nvidia… cc wordgrammer Cheng

I have incredible stupid question - do klee & mcsema support mlir (especially nvgpu dialect)?

interactive #cuda #sass assembler: redplait.blogspot.com/2025/05/nvidia…