Use #PipelineC to listen to FM #radio with an #FPGA #SDR! Huge thanks to Paulo Dutra - PU4THZ and Darkknight512 for making this first version a great learning process. And deepwave for the fantastic #hardware platform and workplace <3 fosstodon.org/@pipelinec/112… #hdl #hls #asic

Thanks again to Rob Stewart and the #HAFDAL24 organizers for having me 🤓 Couldn't make it there yourself? Video is available: fosstodon.org/@pipelinec/112… 🙌 #FPGA #hdl #hls #hardware #rtl

We have #MSK! Doing some simulations (tests next week) for a #SDR #FPGA #RF beacon made with #PipelineC... Next is GMSK, maybe LoRa ? 😁

Blinking the #ULX3S led with #PipelineC ! PipelineC (fosstodon.org/@pipelinec) is a Magic tool that turns C into HDL 🔥 #fpga #ledblink #lattice

IT WORKS!!!! #BPSK Transmitter using #DeltaSigmaModulator made with the #ULX3S #FPGA and PipelineC (fosstodon.org/@pipelinec) ! #RF #SDR #DSP #DAC

Today is the day! First release of DFiant HDL (DFHDL) 🚀 It takes us some time, so we'll be extending to May 2nd, Anywhere On Earth 😉 Here is a little teaser of our updated documentation.

What kind of fixed point (or small floating point) shaders without textures do yall #graphics folks know of? I know Bruno Levy had that great link I need to dig into still 🙌 🤓 #FPGA #RISCV #hardware #hdl #vhdl #verilog #PipelineC #HLS x.com/BrunoLevy01/st…

Dream is more generic pipelined streaming compute accelerator #hardware. #photogrammetry next ? Want custom dataflow to-from memories managed by #CPU threads. looking for help, plenty of work to do. Come chat on Discord 🤓 discord.gg/7DECDMvbmc #HDL #FPGA #HLS #PipelineC

How many triangles until it counts as a GPU? A runtime variable amount > 1? 😅 Cool indeed 😎

Several talks in one. #eda #asic #fpga #hdl Can't share enough. Thanks for the great talk Rice! youtu.be/R2ak8KVo0F0

Making a #FPGA #GPU with PipelineC (fosstodon.org/@pipelinec)... Small lutram framebuffer works! Now with screen space vertex streaming...

Icosphere 😄 80T/240V model #FPGA Rasterizer made on #ULX3S using PipelineC (fosstodon.org/@pipelinec) 320x240px DVI output ~4000 triangles/second? 😳 #gpu #triangles #graphics #cgi #3d #rasterizer #vga #diy

#graphics #demoscene folks: What's possible with just a few hundred bits of memory? Make custom #ASIC #hardware. #PipelineC friends Victor Suarez Rovere and Paulo Dutra - PU4THZ have done LARGE #FPGA demos in the past. Now the challenge is to be very SMALL! 🤓 tinytapeout.com/competitions/d…

Wow, great article on working with #FPGAs. Couldn't agree more that manual by hand pipelining is annoying and tools should do it for you 🤓 #hardware #hdl #hls #eda stitt-hub.com/its-time-to-re…

Over at Digital Design HQ #ddhq, I'm documenting and discussing a #hardware #FPGA #I2S #audio #pmod to-from #AXI project. Stop on by 👋 and see how nice it is to work in #PipelineC 🤓 #RTL #HDL #HLS discord.gg/ceheSfKzRM

Upcoming intro to PipelineC presentation: fosstodon.org/@pipelinec/113…