✨Our first face-to-face meeting was a resounding success. A big thank you to our coordinators ICS_FORTH for hosting. It was great to connect with everyone and discuss big things to come. #HorizonEU #ResearchAndInnovation #Crete

📡Nick Kossifidis from ICS_FORTH presenting our poster "An overview of available and upcoming RISC-V security mechanisms & their potential use in Satellite as a Service scenarios" to Andrea Gallo from RISC-V International International. 🛰️RISC-V In Space Workshop 2025.

If you missed the ETP4HPC webinar "OpenCUBE & RISER: Two projects to advance European cloud platforms" featuring speakers from the OpenCUBE project and RISER, it is now available here: 🔗 youtube.com/watch?v=PF3Zvc…

🚀 See you at the OCP EMEA Summit in Dublin! Don't miss the panel discussion: "The RISC Paradigm Shift: Open Hardware Advancements and the Path to Sustainable Digitalization". 🗓️Wed, April 30, 14:00 - 14:30 🔗 2025ocpemea.fnvirtual.app/a/schedule/

Vincent Casillas (SiPEARL) presented HIGHER at the OCP EMEA Summit yesterday. "A European Data Center-ready Technologies approach to True Hardware Modularity leveraging OCP Standards" A big thank you to all that attended!

🎙️The Open Compute Project EMEA Summit in Dublin has concluded. Thanks to all who attended the panel discussion "The RISC-V Paradigm Shift: Open Hardware Advancements and the Path to Sustainable Digitalization".

🎉 Today, the champions driving RISC-V’s incredible momentum will share their insights, explore developments across industries, and so much more. Here’s a sneak peek at what’s in store for today’s Tutorials and TWGs/SIGs Meetings: 📚 RISC-V 101 🔄 Technology Working Group

Ready to dive into everything RISC-V? At 10 a.m. at the #RISCVSummitEurope, attend a free RISC-V 101 crash course covering the What, Why, and How of RISC-V! Here’s what to expect: 🔍 What Is & Why RISC-V – with Keith Graham, Chair of RISC-V Academia 💻 Software & RISC-V – with

That’s a wrap on today’s RISC-V Tutorials and TWGs/SIGs Meetings at #RISCVSummitEurope! 🤝 The sessions were filled with energy, collaboration, and a shared passion for learning, marking the start of an exciting week ahead. See you tomorrow for Day 1 of the main event!

#RISCVSummitEurope has been great so far, and I am looking forward this afternoon talking about why and how #RISCV can play an important part in #HPC

📢 Today at #RISCVSummitEurope! 🕒 14:45 CET, T2.5.02, Gaston Berger (S2) From Open Silicon to Sovereign Supercomputing with Alexandra Kourfali, EuroHPC Joint Undertaking 🇪🇺 📍Visit BSC-CNS booth #27 for the new RISC-V tech catalogue! bsc.es/sites/default/… #EuroHPC #RISCV #HPC

Day 2 at #RISCVSummitEurope and it's posters all day long! Manolis Marazakis showcasing the HIGHER project with METASAT Project coordinator Leonidas Kosmidis from BSC-CNS Also catch BSC-CNS (booth 27, level S2) & Semidynamics (booth 14, S1)

RISER poster on display today | Day 2 of #RISCVSummitEurope. Manolis Marazakis here with Etienne Walter, from the European Processor Initiative (EPI) EU processor. Also, why not swing by BSC-CNS (booth 27, level S2) & Semidynamics (booth 14, S1)

We are in the #RISCVSummitEurope hosted in Paris, presenting the work fostered in our project from Computer Science @ The University of Manchester and Codeplay Software for accelerating #Java workloads on #RISCV with autovectorization. 🚀 @TornadoVM and #oneAPIConstructionKit are #opensource! HaDEA UK Research Office

🔍 Latest on the RISER Project blog: “The Intersection of Open Hardware and European Data Sovereignty.” Open hardware is fast emerging as a key pillar for ensuring transparency, trust, and sovereignty in technology development. 🔗 riser-project.eu/the-intersecti…

Join us for the Open Compute Project EMEA Community Monthly Call, w/ presentations from Manolis Marazakis (ICS_FORTH) and Karl Rabe (Co-Lead OCP MDC Group) & founder of Wooden Data Center. 🗓️Online: 16:00-17:00, Tue, 10 Jun. More info: higher-project.eu/open-compute-p…

HiPEAC Info #75 is out now! Features 2 RISER articles. Using Multi-devices with OpenMP, by Xavier Teruel and Roger Ferrer (BSC-CNS), & The Role of SiPearl CPUs in the ARM Ecosystem and RISER Project, by Roberto Mostallino (SiPearl). hipeac.net/magazine/7171.…

👋First up in our "Meet the Consortium" series is our coordinating partner ICS_FORTH. Learn about one of Europe's leading research centres and their various roles in the HIGHER project here: 🔗 higher-project.eu/meet-our-conso…

🤔Is this the most complex processor ever conceived in Europe? Learn how SiPearl’s Rhea1 Tape-Out Advances European Sovereignty and Supports HIGHER Project Goals in this post: higher-project.eu/sipearls-rhea1…

👋Next up in our "Meet the Consortium" series is Semidynamics, a driving force in Europe’s semiconductor innovation landscape. Learn about their role in the HIGHER project here: higher-project.eu/meet-our-conso…