Have YOU made a Vedic multiplier recently?

If you have the ability to conjure a theory, prove/disprove it, then you have the ability to solve any problem in the world

One of the misleading things that AI chip vendors can do is quote link rate the bandwidth including protocol overhead instead of the industry established standard data rate which is the bandwidth for just the data instead. We are glad to see that Google TPU team has updated

I wrote a report on the GPU market, covering rendering, gaming, and HPC industries. Some interesting takeaways: - 3+ billion active gamers worldwide - 1+ billion GPUs shipped every year (the majority being smartphones) - 66% of the discrete GPU market has ASPs over $970 - 25-50%

I’ve watched Jill wait hours for a render only to find an issue with the design. It’s a massive waste of power (because you can’t change a render, you have to start over) Time (because you’re waiting to see the output of your work) Money (because someone is paying for your time

Whirlpool 3 added some smoke #b3d #blender

Bring your ideas to life with Zeus, a new type of GPU: - Expandable memory: 32/64/128 GB soldered + 2x/4x SO-DIMM slots for up to 384 GB memory! - Massive improvements to path tracing performance! - 400 GbE QSFP-DD port! - Built-in high-performance RISC-V CPU cores capable of

Initially we are focused on quality, reliability, performance, and volume. As our volume grows into the millions of units (2027) we will be able to reduce our BOM costs and hit sub-$1000 price points

Absolutely no one is surprised by this. Way too expensive, slow, not known to be reliable We are excited to fill this gap in the market in 2027, by doing the opposite of our competitors: x.com/boltgraphicsin…

Forget GPUs. Map the RISC-V register file to HDMI, use it as a framebuffer, and blast RISC-V across the screen on a kianV bare-metal beast. Dave W Plummer

Getting a lot of questions about memory bandwidth. The charts below show bandwidth and cache per FP32 core (I.e. cuda core) 2x memory bandwidth per core vs 5090 11x sram cache per core vs 5090 amd is less cache/BW anemic Zeus scales out well, and keeps data on chip more

We even made a video about it on YouTube.

This is a beautifully done simulation in #Houdini can’t wait to play with all the new mpm solver stuff! Bravo SideFX #VFX #animation #3d #cgi

For the thousands of people that have asked this: How to invest in Bolt Graphics 1. If you are an accredited investor, DM me. 2. If not, later this year we will have an offering for everyone to invest. We’ll post more updates soon. sec.gov/resources-smal…

This is the last missing element to make PULP Platform MCU cluster robust vs soft errors. Protecting memory and cores is not sufficient. You must also protect the low-latency interconnect between them! This paper shows how!

Come work with us on disrupting American GPUs and silicon! We are hiring for all sorts of engineering, ops, finance roles and we just posted the first batch today. Get in on the ground floor as we explode for the moon!!! 🚀🚀🚀 If you are inexperienced but believe you have what