Hardware accelerators for #deeplearning are key to the advancement of #AI. We are giving a full day tutorial w/Joel Emer on this topic at #ISCA2019 #FCRC2019 on June 22; it will go beyond the material in previous offerings. More at eyeriss.mit.edu/tutorial.html -- Early reg by May 24!

(Please RT) SIGARCH/SIGMICRO CARES members express our sadness regarding the passing of Huixiang Chen. ISCA leadership will soon issue a statement. CARES members wish to remind all affected by the tragedy that you are not alone. (1/2) sigarch.org/benefit/cares/

Navigating this, we hope you'll support your fellow students, faculty, and colleagues, & seek help from mental health resources. We're working to officially broaden CARES' mandate for assistance in these circumstances. Meanwhile we're available as individuals to offer our support

Shameless self promotion...

Data movement dominates energy consumption and can limit the speed for DNN processing. Efforts such as processing in memory aim to reduce the data movement cost. Check out an excerpt from our upcoming book "Efficient Processing for Deep Neural Networks" eyeriss.mit.edu/tutorial.html

CARES has been the most rewarding technical service of my life. First, due to the amazing and diverse set of colleagues whose work got CARES going. Second, because the speed/breadth of CARES uptake demonstrates a CS-wide hunger for research communities to feel like *communities*

Interested in the rapid evaluation and design exploration of deep neural network accelerators? Check out our tutorial on Timeloop and Accelergy at ISCA this Friday, May 29 @ 10am ET. Video and reg info at accelergy.mit.edu/isca20_tutoria… #DeepLearning #isca20 #accelerators

We will be running our Timeloop and Accelergy tutorial at #ISPASS this Sunday, Aug 23 @ 1:30pm ET. More info at accelergy.mit.edu/tutorial.html. Register at ispass.org/ispass2020/

Want to learn how to evaluate and compare the huge number of deep learning processors being developed? Check out our latest article for IEEE SSC Society Magazine on "How to Evaluate Deep Neural Network Processors: TOPS/W (Alone) Considered Harmful” rle.mit.edu/eems/wp-conten…

Timeloop, the popular open-source tool for modeling and exploring mappings for dense tensor accelerators, can now model sparse tensor accelerators. Come to our ISCA tutorial on June 19 to learn more - see accelergy.mit.edu/sparse_tutoria…. #isca21 #timeloop

There really are people who care about making the computer architecture community more inclusive please help by attending the CARES committee meeting at ISCA and taking the survey.

The Computer Architecture Student Association (Computer Architecture Student Association (CASA)) are an active group trying to help the computer architecture pipeline. Come hear their and other leaders thoughts on how to improve things even more.

A couple months ago, I was very honored to have been the recipient of the Bob Rau award for my contributions to computer architecture. A video of my acceptance speech given at the MICRO conference in Toronto was recently posted to YouTube: youtube.com/watch?v=iXEnzO….

Our tutorial “TeAAL and HiFiber: Precise and Concise Descriptions of (Sparse) Tensor Algebra Accelerators” will help you understand the salient characteristics of tensor accelerators in just 30 lines of code. See how at MICRO on November 2, 2024 - teaal.csail.mit.edu/tutorials/2024…

Our tutorial “TeAAL and HiFiber: Precise and Concise Descriptions of (Sparse) Tensor Algebra Accelerators” will help you understand the salient characteristics of tensor accelerators in just 30 lines of code. See how at MICRO on October 18, 2025 - teaal.csail.mit.edu

indiegogo.com/projects/czur-…

CRA Expresses Concern at New Executive Order Suspending Visas cra.org/govaffairs/blo…

We will be giving tutorials on Hardware Architectures for Deep Neural Networks at ISCA 2017 (June 2017 in Toronto) a…lnkd.in/gHzn34p

Students going to ISCA can meet 1-1 with one of 100 established architects for mentoring. sigarch.org/meet-a-senior-…