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Hackathon Online is about to kick off — starting Thursday, April 10 at 7AM PST! A few key things before you dive in: ✅ Pick your project — Andes or Codasip! ✅ Prep before the weekend — get your setup ready and troubleshoot early! ✅ Got questions? Ask them on Slack! Our

Verification has become a major bottleneck in semiconductor design. Andrej Tichy breaks down what verification is, why it’s crucial, and how verification engineers play a vital role in ensuring cutting-edge CPUs function correctly. codasip.com/video/why-veri…

Are you ready? The #RISCV online hackathon starts today! Join the challenge and use Codasip Custom Compute to accelerate large language model primitives. Register by April 11 at 9:30 AM Pacific Time. community.riscv.org/events/details…

This week, the Czech Semiconductor Centre in Brno was launched. Codasip is one of the members of the consortium behind the center, and our founder and Chief Innovation Officer Karel Masarik has been selected as it's director.

Codasip Studio makes it easier and more convenient to explore the potential benefits of custom instructions for cryptographic algorithm optimization within the #RISCV architecture. Head over to our blog to learn more! codasip.com/2025/03/26/des…

At #ew25 we caught up with the team from ipXchange to explain how we utilize CMSIS for simplified migration to #RISCV. Watch the video below! Codasip L110 vs ARM M7: Who wins?  codasip.com/video/codasip-…

Interested in the latest in cybersecurity and #RISCV? Going to the #RISCVSummitEurope in Paris? We are bringing not one, but 4 different posters on CHERI. Make sure to see them and talk to our amazing security architects on site. riscv-europe.org/summit/2025/

We are excited to announce the latest release of Codasip Studio, packed with features to streamline and enhance the custom processor design journey. One of the feature highlights of this release is the integration with MachineWare’s SIM-V simulator. codasip.com/2025/04/22/mac…

The winners of the RISC-V Hackathon online have been revealed! Check out the top solutions and learn more about the customization challenge we presented to the contestants. youtu.be/6HtgXuuyP1s?si…

#RISCVSummitEurope highlight! Panel: Accelerating Automotive Innovation with RISC-V: The journey from early adoption to industry wide deployment Wednesday, May 14 at 17:15. Learn more about our participation  codasip.com/events/risc-v-…

🔔 Press release: Codasip launches complete exploration platform to accelerate CHERI adoption codasip.com/press-release/…

Codasip launches Codasip Prime, the first #CHERI-enabled RISC-V development platform based on the X730 CPU. Built for secure, memory-safe apps in consumer, auto, and defense sectors. #Cybersecurity #Codasip #SecureSoftware #FPGA #EmbeddedSystems electronicsmedia.info/2025/04/29/cod…

Codasip Studio is now integrated with MachineWare’s SIM-V simulator. Learn more 👇 codasip.com/2025/04/22/mac…

Wishing you all a very happy #StarWarsDay!  #MayThe4thBeWithYou

We are excited for RISC-V Summit in Paris next week. If you are going, make sure to attend the automotive panel. 📅 Wednesday May 13 at 17:15 Learn more: codasip.com/events/risc-v-…

Introducing Codasip L150: a 3-stage, 32-bit RISC-V core designed for real-time embedded applications where area and power efficiency are critical. Beyond the efficient baseline architecture, Bounded Customization enables domain-specific optimization. codasip.com/2025/05/08/bou…

#ICYMI We have launched Codasip Prime for #CHERI featuring a high-performance FPGA system, including the processor and peripherals, and a full software development kit. Learn more: codasip.com/press-release/…

#RISCVSummitEurope highlight! Using CMSIS for simplified migration to RISC-V Wed 14 at 10:35, in Louis Armand East (S3) By Keith Graham, Vice President of University and Customer Experience Program, Codasip.

Enabling early software development is very important. At Codasip we realize that and provide number of simulation models with our customizable RISC-V processors. Now including MachineWare's SIM-V. codasip.com/2025/04/22/mac…

Breaking the performance limits while keeping the design and verification effort at minimum. This is what we enable with Bounded Customization. See how we deliver more precise and responsive motor behavior with the brand new Codasip L150 RISC-V core. codasip.com/2025/05/08/bou…