📌 A UCIe Optical I/O Retimer Chiplet for AI Scale-up Fabrics 🗣️ Vladimir Stojanovic, co-founder and CTO, Ayar Labs 🗓️ Tuesday, August 26, 8:30 – 10:00 a.m. PDT 🌍 Hot Chips - Stanford University More information: bit.ly/3HLwFZ5 #HotChips2025

We are excited to welcome Geoff Tate to ourBoard of Directors! Geoff has an accomplished career as a technology entrepreneur and board member, including: – Founding CEO of Rambus – Founding CEO of Flex Logix – Former Senior VP Microprocessors at AMD bit.ly/3UBGEDc

Presented at Hot Chips (Hot Chips), we subjected our TeraPHY™ optical I/O chiplet to a battery of engineering validation and thermal tests. Check out the recap of the tests and results: bit.ly/4n8SLnu #HotChips2025 #optical #photonics #semiconductor #AI #HPC

📌 Co-Packaged Optics for AI Scale-Up Networks: Unleashing the Next Era of AI Performance and Profitability 🗣️ Mark Wade, co-founder and CEO, Ayar Labs 🗓️ Monday, September 8, 2:00 – 2:25 p.m. TST 🌍 #SEMICONTaiwan - Taipei, Taiwan More information: bit.ly/47vvt6K

At #AIInfraSummit, visit booth #711 to check out our updated AI System Architecture Tool. By evaluating system-level performance and economics, see the enormous I/O benefit Ayar Labs' solution provides versus traditional, electrical I/O infrastructure. bit.ly/482EaFE

📌 Networking: Solving AI System Bottlenecks with Optical I/O 🗣️ Vladimir Stojanovic, CTO and co-founder, Ayar Labs 🗓️ Wednesday, September 10, 3:20 – 3:40 p.m. 🌍 #AIInfraSummit - Santa Clara, CA More information: bit.ly/47E2fTk

Vladimir spoke at the AI Infra Summit on architecting the next-gen AI platforms with optical I/O. Check out our system architecture simulator at our booth #711 and learn about the benefits of Ayar Labs optical I/O for AI scale-up and extended memory. bit.ly/3JYxrTd

And that is a wrap at #AIInfraSummit! Thank you for checking out our updated AI system architecture tool, learning more about our technological advancements, and attending our event session. We look forward to seeing you at upcoming events: bit.ly/41TphSp

The UCIexpress standard is solving the chiplet interoperability challenge by creating an open, standardized way for chiplets to interconnect. Ayar Labs is one company that has already developed a UCIe optical chiplet. Read more on DCD: bit.ly/48upboa

At the 2025 TSMC North America OIP Ecosystem Forum, Alchip Technologies and Ayar Labs unveiled a co-packaged optics (CPO) solution that is designed to efficiently extend scale-up network connectivity beyond traditional rack boundaries. Full Press Release: bit.ly/46FoDtk

At the AI Infra Summit, our CTO, Vladimir Stojanovic, explains how optical I/O is breaking through copper’s limits to unlock massive GPU scaling, higher performance per watt, and new system architectures. From Jim Carroll and Next Gen Infrastructure: youtu.be/9EaDd5_HFqA?si…

Our CTO and co-founder, Vladimir Stojanovic, joins theCUBE and NYSE 🏛 Wired on their new series: "AI Factories - Data Centers of the Future." bit.ly/4pVbFQG #optical #photonics #semiconductor #AI

In the race to power next-gen AI systems, data connectivity has emerged as the critical bottleneck. Alchip Technologies and Ayar Labs' collaboration shatters these barriers through CPO and advanced packaging innovations. Read more on SemiWiki (SemiWiki): bit.ly/475OMBM

Today, Goldman Sachs is recognizing Ayar Labs CEO & co-founder Mark Wade as one of the Most Exceptional Entrepreneurs of 2025 at its Builders and Innovators Summit in Healdsburg, California. Full press release: bit.ly/4hii2dg #GSInnovators

The race for AI supremacy won't be won in model architectures. It will be won in the infrastructure layer. Join leaders from Alchip Technologies, Astera Labs and Ayar Labs as they explore the silicon photonics roadmap reshaping AI infrastructure. Register today: bit.ly/4naaY3A